The DETS-1800 Digital Electronics Trainers is a series of 10 pre-wired Experiment Circuits Modules designed to fit our ULT-3000 Universal Lab Trainer (Analog and Digital Lab Trainer) in place of the standard breadboard module. Each experiment circuit schematic is clearly printed on the top panels of the modules.
This trainer complete with needed power supplies and source generators needed to carry out the digital electronic experiments complete system with connecting leads, experimental and teacher manuals.
An experiment manual accompanies the modules detailing eighteen (18) experiments in an easy to follow step-by-step manner. These benefit the student in that valuable lab time can now be devoted to studying the Digital Electronics.
Main Unit ULT-3000
The main unit incorporates all necessary equipment for use with the plug-on training modules. Power supply, signal generator, and a wide range of logic switches and indicators are all built-in.
The DC power supply provides fixed ±5V at 1A, ±12V at 1A, and a variable ±1.5V~±20V at 1A The function generator & signal generator provides clock signals from 1Hz to 1MHz in 6 ranges. The main unit is also supplied with a removable 1680 tie point universal breadboard for general experimentation and prototyping circuits rather than wiring them up.
Experiment Modules
Experiment 1 : Basic Logic Functions
OBJECTIVE:
1. To study the basic logic functions AND, OR, INVERT, NAND, and NOR.
2. To study the representation of these functions by truth tables, logic diagrams, and Boolean algebra.
Experiment 2 : Boolean Algebra and Simplification of Logic Equations
OBJECTIVE:
To study the methods of representing and simplifying the logic equations by using Boolean algebra.
Experiment 3 : DeMorgan's Theorem
OBJECTIVE:
To simplify and modify Boolean logic equations by means of DeMorgan's theorem
Experiment 4 : TTL NAND / NOR Gates Definitions and Operation
OBJECTIVE:
1. To study the operation of the TTL gate.
2. To determine the loading rules for the TTL gate.
3. To define the logic levels 1 and 0.
4. To determine the noise immunity of the TTL gate.
5. To compare positive and negative logic.
6. To study the effect of capacity loading upon TTL switching rates
Experiment 5 : The "Exclusive-OR" and Its Applications
OBJECTIVE:
1. To study methods of generating the exclusive-OR function.
2. The half-adder and half-subtractor.
3. Binary comparators.
4. Parity generators.
Experiment 6 : Full-Adder and Full-Subtractor
OBJECTIVE:
To study methods of generating circuits that performs the arithmetic operations of full addition and full subtraction.
Experiment 7 : Bi-stable or Flip-Flop (FF)
OBJECTIVE:
To study the characteristics and operation the various types of bi-stables.
Experiment 8 : Binary Counters and The Binary Number System
OBJECTIVE:
1. To study the operation of binary counters.
2. To study binary counting and the representation of numbers in the binary number system.
Experiment 9 : Divide-by-N Counters and Decade Counters
OBJECTIVE:
1. To study counters that divide the incoming frequency by counts other than binary powers and which use cascaded T flip-flops.
2. To study the count states of these counters.
3. To study the weighted BCD decade counters 8421 and 2421.
4. To study the unused states of the 8421 counter.
Experiment 10 : Shift Registers and Ring Counters
OBJECTIVE:
1. To study the shift register and its properties.
2. To study ring counters.
3. To study the twisted ring counter.
Experiment 11 : Pulse Forming and Shaping; The Schmitt Trigger
OBJECTIVE:
1. To study the transistor astable multivibrator.
2. To study the IC astable multivibrator.
3. To study the pulse stretcher/monostable.
4. To study the Schmitt trigger.
Experiment 12 : Integrated-Circuit Timers The 79122, 79121, and 555
OBJECTIVE:
1. To study the properties of the 74122 retriggerable resettable monostable multivibrator.
2. To study the properties of the 74121 monostable multivibrator.
3. To study the properties of the 555 timer.
Experiment 13 : Decoding and Encoding
OBJECTIVE:
1. To study the operations of decoding of electronic counters.
2. To study the operations of encoding and code conversion.
Experiment 14 : Random-Access Memory; (RAM) Scratch Pad Memories
OBJECTIVE:
1. To study the basic principles of semiconductor memories.
2. To study the operation of an MSI (TTL) 64-bit memory cell.
Experiment 15 : The Operational Amplifier
OBJECTIVE:
1. To study the operational amplifier as a precision analog voltage amplifier.
2. To study the operational amplifier as a multiplying and summing amplifier.
3. To study the operational amplifier as a comparator.
4. To study the operational amplifier as an integrator.
Experiment 16 : Digital-To-Analog (D/A) and Analog-to-Digital (A/D) Conversion
OBJECTIVE:
1. To study the binary weighted ladder method of D/A conversion.
2. To study the comparison method of A/D conversion.
Experiment 17 : Complementary Symmetry MOS (CMOS) Principles and Characteristics
OBJECTIVE:
1. With complementary symmetry MOS (CMOS) to study logic operations.
2. With complementary symmetry MOS (CMOS) to study noise immunity.
3. With complementary symmetry MOS (CMOS) to study dissipation.
Experiment 18 : Complementary Symmetry MOS (CMOS) TTL Interface
OBJECTIVE:
To study the problems and methods of interfacing the CMOS logic family with the bipolar TTL logic family.
Main Unit
Universal Lab Trainer
ULT-3000
OVERVIEW
The ULT-3000 is a full functional digital and analog lab station that meets the needs of most R&D labs and analog & Digital training programs, optional module is also available, such as Digital Volt Meter module, BCD decoder module, Frequency Counter module, Logic gate module, etc.
SEPCIFICATIONS
1. DC Power Supplies Module
Fixed Output : +5V/1A, -5V/1A, +12V/1A, -12V/1A
Variable Output : 0V to +20V/1A, 0V to -20V/1A
All power supplies are short circuit protected
2. AC Power Supplies Module
19V 15V 9V 0V 9V 15V - 19V
3. Function Generator (2 Channels) & Clock Generator (2 Channels)
Sine, Triangle and Square waveform output
Frequency range : 1Hz to 1MHz in 6 decades
With fine adjust, Amplitude and DC offset control
Clock output 1Hz to 1MHz in 6 decades
Six frequency ranges:
1Hz to 10Hz
10Hz to 100Hz
100Hz to 1KHz
1KHz to 10KHz
10KHz to 100KHz
100KHz to 1MHz
Sine wave output: 0 to 9V peak to peak variable
Triangle wave output: 0 to 6V peak to peak variable
Square wave output: 0 to 9V peak to peak variable
4. Removable Breadboard Module
with 1680 tie points
5. TTL/CMOS Selection Switch
Select TTL or CMOS Mode for data switches ONLY
6. 2-Single Shot Pulse Output Module
80uS Pulse
7. Two digits of 7-segment LED Display Module
8. 8-bit LED Indicators with buffer Module
9. 8 HI/LO Data Output Switches Module
10. 3-State Logic Probe Module
with 7-segment display
11. Digital Voltmeter (DVM) Module
4 Digits LED display
Four voltage ranges :
0V to 199.9VDC
0V to 19.99VDC
0V to 1.999VDC
0V to 199.9mVDC
Input Impedance: 10Mohm for any range
12. Speaker Module
8Ohm, 0.25W
13. Flip-Flop Module
With J-K Flip-Flop x 2
14. Plug Interface Module
Miniature Plug, Mini Plug & Standard Plug Adaptors
The ULT-3000 is shipped with a comprehensive users manual and a power cord.
Power Supply : 240VAC, 50Hz (Fused Protected)
Dimensions : (W x D x H) 310 x 260 x 90mm
Weight : 3.0 kgs
System &
Solution at Affordable Price 
